In semiconductor integrated circuit (IC) industry, technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of IC processing and manufacturing.
For example, the need to perform higher resolution lithography processes grows. One lithography technique used to address this need is extreme ultraviolet lithography (EUVL). Masks used in EUVL present new challenges. For example, a multilayer structure is used in an extreme ultraviolet (EUV) mask. A microscopic non-flatness (caused by a defect, for example) on a surface of the substrate of the EUV mask may deform the films of the multilayer structure deposited subsequently thereon, which may affect the quality or integrity of the corresponding exposed image. However, defects below or inside a multiplayer of EUV masks cannot be removed by standard repair techniques.
Therefore, it is desired to provide an improved mask repair method.